Human Folly about “iCE40”

index

• Linux on LiteX VexRiscv (github.com):

  Apparently you can run #RISC-V Linux on an #ice40 or at least a Lattice ECP5 now, on a versa_ecp5 board? And this package includes all the deps and has an easy-to-use script and getting-started guide?

  on 02024-01-25
• (github.com):

  apparently #VexRiscv and also #PicoRV32 supports the #iCE40 UP5K #hardware multipliers now (there are 8) because #Yosys can infer them as of last year

  on 02023-09-02
• SPRAM iCE40 FPGA (projectf.io):

  to use the single-ported RAM on a #Lattice #iCE40 #FPGA you have to tell #Yosys explicitly to instantiate an SB_SPRAM256KA

  on 02023-09-01
• Mecrisp quintus Forth with PicoRV32 on UPduino and 8 queens benchmark (eevblog.com):

  apparently the #PicoRV32 implementation of #RISC-V runs at 12MHz or 24MHz on an ice40UP5k #iCE40 #FPGA but gets half a #Dhrystone MIPS per MHz

  on 02023-05-25
• How to build your own CPU from scratch inside an FPGA (pingu98.wordpress.com):

  apparently you can get Picorv32 #RISC-V to run on a #iCE40 #FPGA #hardware

  on 02021-01-24