#AVR #ISA calling conventions for GCC: R2–R17, R28, and R29 are “call-saved”, plus implicitly R1, which has to always be kept 0.
on 02026-09-11The #PULP architecture family from #ETH Zurich augments #RISC-V with #hardware zero-overhead loops and post-increment addressing. #ISA
on 02026-09-02#ISA #architecture comparison between amd64 and ARM64 by David Chisnall on #Mastodon, reporting on research he did at Microsoft finding, among other things, that ⅔ of values are used exactly once
on 02026-07-17The new #RISC-V unprivileged #ISA #PDF is 696 pages and includes Zba and Zbb.
on 02026-06-03The Mill #hardware #ISA can supposedly do a switch statement in three instructions. #performance
#reverse-engineering the 8008 ALU #hardware, which does sum, AND, XOR, and OR with carry-lookahead and AND-OR-NAND gates, along with some notes on the 8008’s instruction set #ISA being derived from the Datapoint 2200.
on 02017-03-11#PDF of Tanenbaum (et al)’s 1983 #paper on “a machine architecture for use with block-structured languages” called EM; really more of an UNCOL than a machine #ISA. #compilers #toread
on 02017-03-11A 2D #esolang wrapped around the faces of a cube. Stack-based, two-dimensional instruction pointer, textual source code with one-byte instructions, 13 ALU operations, random-access stack operators for Turing-completeness. #ISA
on 02016-09-27The 8086 family #asm #ISA, including instruction cycle timings for the 8086 through the 80486.
on 02016-09-16An optimized integer division library, using multiplication and bitshifts, in part because the #SSE #ISA has no division instruction (like the Cray vector operations before it). #algorithms
on 02016-07-21“The Other #Turing Machine”, on the Turing-designed #Pilot-ACE, the world’s fastest computer from 1952 to 1957. Binary, two’s-complement, software floating-point, with 1024 tanks (though the Pilot version only had 32 I think?) of 32 32-bit “minor cycles”, plus six temporary storage tanks. PC was called “instruction number” or “current data”; PUSH and POP were BURY and UNBURY subroutines (and UNBURY was actually RET); planned to do two multiplications to implement a conditional branch; ALU is “central arithmetic organ”; subroutines are “groups” and programs are “instruction tables”. It’s kind of amazing that Turing in 1945 had already thought up subroutine libraries, linkers, and just-in-time compilation. By the time of the Pilot, there was a conditional-skip instruction, and “the return-address stack was abandoned.”. #hardware #ISA #history
on 02016-07-11#PDF about the #GreenArrays F18A #hardware used in the GA144, documenting its instruction set. #stack #ISA #Forth
on 02016-05-24the Zork #Z-machine #virtual-machine #ISA architecture had JSish property lists (albeit with 5-bit property IDs) for the objects (“Things”) in the game, which were organized into a rigid but mutable containment tree; they were mutable and not pageable, but program code was immutable and consequently pageable.
on 02016-04-26interesting retrospective on 1999–2015 development of computing by Dan Luu; includes the tidbit that an ARM #ISA instruction decoder is physically larger and more complex than a 386 decoder. #hardware
on 02015-11-30