#hardware #electronics transmission electron micrographs of Intel’s 6nm process, showing gate widths of 1.7nm to 5.5nm and gate lengths of 6–7nm. The micrographs are taken aligned with the lattice so you can count the atoms.
discussion of #electronics #hardware dimensions of physical transistors. “Contacted poly pitch”, the distance from one transistor’s gate to the next, is maybe 51nm in a 5nm process, but the actual gate length is about 6nm.
Synopsys says 7nm contacted gate pitch is 42nm and its fin pitch is 24nm, so in a square micron you can get (1000/42) × (1000/24) transistors, about 992. 14nm was CGP = 90nm, FP = 48nm, very close to linear scaling with the nominal gate length.
#IHP 130nm BiCMOS Open Source #PDK for analog, mixed-signal and RF design. Work in progress, but they’re doing their first #Tiny-Tapeout already. “SG13G2 is a high performance BiCMOS technology with a 0.13 μm CMOS process. It contains bipolar devices based on SiGe:C npn-HBT’s with up to 350 GHz transition frequency (fT) and 450 GHz oscillation frequency (fmax).” #electronics #hardware
full listing of #GF180 #PDK devices. MIM capacitors are “1.0fF/um²” up to twice that. #electronics #hardware
The mailing list for the #GF180 #PDK seems to be dead, 11 messages total and no email since 02023.
#IHP Tiny Tapeout. Mostly just digital #electronics #hardware designs.
#IHP #pricing for their 130nm and 250nm processes. Their #MPW price for the SG13G2 process for which they offer an open-source #PDK is €7300/mm². “minimum area requirement of only 0.8 mm² for all runs with bold shipment times.” However, no shipment times appear to be in bold, and the normal minimum seems to be 10mm². Looks like the tape-in-to-shipment-time delay for MPWs is about 6 months. You get 40 diced samples. I’m guessing you can do about 2.5 transistors per μm² in the 130nm process, so 0.8mm² is about 2 million transistors.
#PDF slides on the first year of the #IHP open-source 130nm SG13G2 #PDK. “a 200mm pilot line for state-of-the-art BiCMOS technologies, operated under industry-like conditions, 24/7, for the provision of prototypes and low-volume production runs.” MIM caps are 1.5fF/μm², or 2.1 for copper.
The open-source #IHP #PDK middle of last year: “Designs already submitted for production include a delta-sigma modulator put together as part of Boris Murmann’s electronic engineering course at the University of Hawaiʻi at Mānoa, a 24GHz low-noise amplifier (LNA) from Martin Sander at Ulm University, a different LNA targeting cellular devices from a team at the Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), and a simple RISC-V CPU designed by Daniel Schultz and Steffen Reith.” #hardware #electronics
haha, #8051 #hardware from #WCH running at 56MHz with 6KiB of RAM.