#Wirth’s page on #Wirth-RISC
on 02022-05-21The Project #Oberon book #PDF has a chapter about the #Wirth-RISC #hardware, largely the same as the people.inf.ethz.ch PDFs, but covering the Verilog in detail, and for example describing the floating-point format and logic, the PS/2 mouse protocol and its Verilog implementation on #FPGA, and quadrature decoding. #smallisbeautiful
on 02020-06-23The #Oberon SD card image for #Wirth-RISC.
on 02020-06-23The "OberonStation" #Oberon #FPGA #Wirth-RISC workstation site has gone offline but survives in the Archive for now.
on 02020-06-23#Wirth’s CPU #hardware "Wirth RISC" explained at some more length. #PDF #smallisbeautiful
on 02020-06-20#Wirth designed a very simple CPU for #Oberon (etc.) he calls just “RISC”, though it's not the Berkeley RISC. So I keep calling it the #Wirth-RISC. #hardware #PDF #smallisbeautiful
on 02020-06-20An #Oberon workstation running on Oberon #Wirth-RISC on an FPGA.
on 02015-10-29