Human folly for 02023-07-05

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• (nullprogram.com):

  custom hash tables can have #performance an order of magnitude better than generic ones, as Chris #Wellons demonstrates here #hashing in Golang

• ARM why do I need to push pop two registers at function calls (stackoverflow.com):

  apparently on #ARM when #GCC only has to push LR, it pushes an extra unnecessary temp register onto the stack to ensure SP is 8-byte-aligned at all times, because that’s what the ABI requires, because the ARMv4 strd and ldrd instructions require 8-byte alignment. #asm

• Calling convention (en.wikipedia.org):

  #ARM calling conventions

• Compiling to asm on an ARM chip why are only R1 R2 and R3 registers used (stackoverflow.com):

  oh hey #GCC has -fverbose-asm which helps significantly in getting readable #asm for #ARM!

• (softwareengineering.stackexchange.com):

  examples of incompatibilities between #C and #C++

• Lec21 Schorr Waite (cs.cornell.edu):

  #PDF #paper by David Gries “Schorr-Waite Graph Marking Algorithm –Developed With Style” where he gives the Deutsch-Schorr-Waite #garbage-collection graph-marking algorithm as something like p = root; q = vroot; while (p != vroot) { p.m++; if (p.m == 3 || p.car.m == 0) { [p, p.car, p.cdr, q] = [p.car, p.cdr, q, p]; } else { [p.car, p.cdr, q] = [p.cdr, q, p.car]; } where the comma-assignment statements are multiple assignments and .m goes from 0 (for unvisited) to 3 (for marked), nil pointers are represented by pointers to a node whose car and cdr point to itself, and vroot is a special distinguished node that we pretend is the parent of the root. #algorithms

• What registers to save in the ARM C calling convention (stackoverflow.com):

  EABI, the new Linux #ABI for #ARM, is actually the ARM APCS.

• Why are local variables of caller stack saved in registers in callee stack (stackoverflow.com):

  lengthy exegesis of #ARM #ABI in #asm as our hero fights with their compiler

• Assembling Thumb instrutions to execute on Cortex M3 (stackoverflow.com):

  explains how to control #OpenOCD by telnetting to port 4444 and typing textual coommands. Discussion of what #asm the #STM32 STM32F103 does and doesn't support. Discussion of linker scripts. Explanation of the #ARM literal pool.

• Chdcicdf (developer.arm.com):

  Listing of #ARM Cortex-M0 instructions.

• Dhrystone (netlib.org):

  #Performance database server: #Dhrystone benchmarks of many historical machines; a 5x86-133 had 44 DMIPS