#ebook chapter #PDF about #integer-programming #optimization
#Trump #tariffs may need to be refunded, about a trillion dollars for #USA #politics
Bruce Hoult’s #performance benchmarking test, a C routine that tabulates all primes up to 7919² = 62710561
#Tesco is suing #VMWare
#VAX #asm return instruction is rather hairy: “SP is replaced with FP plus 4. A longword containing stack alignment in bits 31:30, a CALLS/CALLG flag in bit 29, the low 12 bits of the procedure entry mask in bits 27:16 and a saved PSW in bits 15:0 is popped from the stack and saved in a temporary (tmp1). PC, FP and AP are replaced by longwords popped from the stack. A register restore mask is formed from bits 27:16 of tmp1. Scanning from bit 0 to bit 11 of tmp1, the contents of the registers whose numbers indicated by set bits in the restore mask are replaced by longwords popped from the stack. SP is incremented by bits 31:30 of tmp1. PSW is replaced by bits 15:0 of tmp1. If bit 29 of tmp1 is 1 indicating a CALLS was used) a longword containing the number of arguments is popped from the stack. Four times the unsigned value of the low byte of this longword is added to SP and SP is replaced by the result.”
#PDF of Henry #Baker and Clinton Parker’s 01979 language "Micro-SPL", used to write #microcode for the #Xerox #Alto. It is much more similar to Parker’s later Atari language “Action!” than to HP SPL. “The Micro-SPL compiler generates microcode which is competitive with hand microcode, yet takes only 30-50% as long to write and 10% as long to debug. Micro-SPL generated microcode runs over ten times faster than an equivalent BCPL program and perhaps half as fast as good hand written microcode without losing the advantage of writing in a high level language.” #retrocomputing #history
Quadrature on evenly spaced points uses the Newton–Cotes formulas, a generalization of the trapezoid rule and Simpson’s rule. #math
Richardson extrapolation is a convergence-accelerating technique. #math
Adaptive quadrature. #math
An adaptive quadrature technique in which “Using Richardson extrapolation, the more accurate Simpson estimate (S(a,m)+S(m,b)) for six function values is combined with the less accurate estimate (S(a,b)) for three function values by applying the correction ([S(a,m)+S(m,b)-S(a,b)]/15). So, the obtained estimate is exact for polynomials of degree five or less.”
#video talk by Kulukundis on #Swiss-Tables at cppcon 2019. #toread
#amd64 #asm instruction TZCNT or BSF counts the number of trailing zeroes. #bitmanip
#ARM CPUs (bigger than Cortex-M0 or Cortex-M0+) have a CLZ #bitmanip instruction to count the number of leading zeroes, and CMSIS-CORE has a __CLZ intrinsic function for when you aren’t in #asm. Also signed saturate, unsigned saturate, rotate right with extend, wait for event, etc.
The CLZ #asm #bitmanip instruction is __builtin_clz on GCC, but this page claims to have a 13-instruction-time version with better #performance than all the “Hacker’s Delight” entries, with “[bisection] to find out which 8-bit chunk of the 32-bit number contains the first 1-bit, which is followed by a lookup table clz_lkup[] to find the first 1-bit within the byte.” Handy for Cortex-M0 #ARM chips without the instruction.
#ARM #asm has movt and movw instructions in later Thumb2 versions; these permit you to load a 32-bit constant in two instructions, each supplying 16 bits. movw clears the high bits and movt loads them. This question pertains to #Clang needing -mthumb to assemble Thumb asm. #movt
#ARM Cortex-M3 added a CLZ #bitmanip instruction, but this is an #asm version of it for more primitive ARMs.
#Valgrind #documentation on the Callgrind ASCII #file-format
GNU assembler for #ARM #asm with .syntax unified insists that you write adds rather than add to compile to Thumb-1 code. And with Thumb-2 it will generate a wide add instruction if you don’t say adds. Notlikethat explains: “The only Thumb encodings for (non-flag-setting) mov with an immediate operand are 32-bit ones, however Cortex-M0 doesn’t support those, so the assembler ends up choking on its own constraints.” Similarly for mov vs. movs.
Similarly movs is allowed and mov is not in Thumb-1 #ARM #asm. As old_timer says, “The short answer is that you cannot because the instruction does not exist. If you are using unified syntax documentation that glosses over which instruction sets are supported, then you have, as many others, fallen into the trap of the major failing of the unified syntax.”
#ARM #documentation on loading constants in #asm, using constant pools, MOV, MVN, etc. “MOV can load any 8-bit constant value, giving a range of 0x0-0xFF (0-255). It can also rotate these values by any even number.” Adjacent sections of the manual explains LDR with constant pools and the MOV32 pseudo-instruction.
This is the #ARM #documentation for the MOV32 pseudo-instruction consisting of MOV (now we call it movw) and #MOVT.
#USA #politics of #energy: Angus King says many RTO interconnection queues are 5 years long, and so are the waiting lists for gas turbines!